Getting High-Performance Silicon from System-Level Design

System-level design techniques promise a way to lessen the productivity gap between fabrication and design. Unfortunately, these techniques have been slow to catch on, in part because they do little to help designers optimize hardware. This paper presents a brief summary of three system-level design techniques, Platform-based design, SystemC, and Chip-in-a-day, in order to propose that more system-level abstraction of physical performance is needed to make these techniques more useful. An analysis of design-productivity for three chips designed with the Chip-in-a-Day flow is also presented.